The software write access of a register can be locked based on the value of another register field or based on an expression consisting of different registers or fields. See the logical view of Lock Register:
Some registers are not directly accessible via a dedicated address. Indirect access of an array of such registers is accomplished by first writing an “index” register with a value that specifies the array’s offset, followed by a read or write of a “data” register to obtain or set the value for the register at that specified offset. See the logical view of Indirect register with ARV:
ARV automatically generates all of the call back classes into register model, also generates UVM sequences for special registers like Shadow Register, RO-WO pair at same address, Aliased Register, Locked Register, Trigger-Buffer Register (Wide register), Indirect Register, Interrupt Fields/Registers, Counters, FIFO Register, Paged Register, External (User Defined) Registers etc.